/* Set the Vector Table base location at 0x20000000 */

NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);

#else /* VECT_TAB_FLASH */

/* Set the Vector Table base location at 0x08000000 */

NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);

#endif

NVIC_InitStructure.NVIC_IRQChannel = TIM3_IRQChannel;

NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;

NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;

NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;

NVIC_Init(NVIC_InitStructure);

}

void Timer_init(void)

{

TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;

// ---------------------------------------------------------------

// TIM3 Configuration: 定時(shí)器3配置

// TIM3CLK = 36 MHz, Prescaler =36000, TIM3 counter clock = 1KHz

// SET TTIM3 TIME 200mS

//---------------------------------------------------------------

RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3,ENABLE);

// Time base configuration

TIM_TimeBaseStructure.TIM_Period = 200;

TIM_TimeBaseStructure.TIM_Prescaler = 0;

TIM_TimeBaseStructure.TIM_ClockDivision = 0;

TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Down;

TIM_TimeBaseInit(TIM3, TIM_TimeBaseStructure);

//Enables peripheral Preload register on ARR

TIM_ARRPreloadConfig(TIM3,ENABLE);

// Prescaler configuration

TIM_PrescalerConfig(TIM3, 35999, TIM_PSCReloadMode_Immediate);

TIM_InternalClockConfig(TIM3);

//Enables TIM interrupts

TIM_ITConfig(TIM3,TIM_FLAG_Update,ENABLE);

//TIM3 enable counter

TIM_Cmd(TIM3, ENABLE);

}

………………………………………………………………………

void TIM3_IRQHandler(void)

{

static u8 count=0;

if (TIM_GetITStatus(TIM3, TIM_IT_Update) != RESET)

{

TIM_ClearITPendingBit(TIM3, TIM_IT_Update);

//TIM3溢出中斷需執(zhí)行的代碼在此添加

count++;

if(count=25)

{

/* Enable write access to IWDG_PR and IWDG_RLR registers */

IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable);

/* Reload IWDG counter */

IWDG_ReloadCounter();

}

}

}

四、結(jié)語

獨(dú)立看門狗時(shí)鐘由內(nèi)部40KHZ提供，所以不受主時(shí)鐘的影響，即一旦啟動(dòng)看門狗，即便在調(diào)試過程中，暫停程序運(yùn)行，看門狗也將不會(huì)停止，在復(fù)位時(shí)間到后仍會(huì)將系統(tǒng)復(fù)位。